Games - HyperTransport

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	Games - HyperTransport

HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency computer bus. The HyperTransport Technology Consortium is in charge of promoting and developing HyperTransport technology. The technology is used by AMD and Transmeta in x86 processors, PMC-Sierra, Broadcom, and Raza Microelectronics in MIPS microprocessors, NVIDIA, VIA, SiS, ULi/ALi, and AMD in PC chipsets, Apple Computer and HP in Desktops and notebooks, HP, Sun Microsystems, IBM, and IWill in servers, Cray, Newisys, and PathScale in high performance computing, and Cisco Systems in routers.

Overview

HyperTransport runs at 200-1400 MHz (compared to PCI at either 33 or 66 MHz). It is also a DDR or "Double pumped" bus, meaning it sends data on both the rising and falling edges of the clock signal. This allows for a maximum data rate of 2800 MTransfers/s per pair running at 1400MHz. The frequency is auto-negotiated.

HyperTransport supports an auto-negotiated bus width, based on two 2-bit lines to 32-bit lines. The full-sized, full-speed 32-bit bus in each direction has a transfer rate of 11,200 MByte/s (2*(32/8)*1400), making it much faster than existing standards. Buses of various widths can be mixed together in a single application, which allows for high speed buses between main memory and the CPU, and lower speed buses to peripherals, as appropriate. The technology also has much lower latency than other solutions.

HyperTransport is packet-based, with each packet always consisting of a set of 32-bit words, regardless of the physical width of the bus interconnect. The first word in a packet is always a command word. If a packet contains an address, the last 8 bits of the command word are chained with the next 32-bit word to make a 40-bit address. The remaining 32-bit words in a packet are the data payload. Transfers are always padded to a multiple of 32 bits, regardless of their actual length. HyperTransport revision 1.05 contains an option allowing an additional 32-bit control packet to be prepended when 64-bit addressing is required.

HyperTransport packets come out onto the bus in segments known as bit times. How many bit times it takes depends on the width of the bus. HyperTransport can be used for generating system management messages, signaling interrupts, issuing probes to adjacent devices or processors, and general I/O and data transactions. There are usually two different kinds of write commands that can be used, posted and non-posted. Posted writes are ones that do not require a response from the target. This is usually used for high bandwidth devices such as UMA traffic or DMA transfers. Non-posted writes require a response from the receiver in the form of a target done. Reads also cause the receiver to generate a read response.

HyperTransport also greatly facilitates power management as it readily supports C-state specific messages on various architectures. Power management messages are transmitted in system management packets, prepended with a FDF91... For specific C-state messages, the HT specification employs the use of signals like the HTStop signal. This is to allow HyperTransport controllers to disconnect end devices on the HyperTransport chain when a processor is entering a C3/C4 sleep state or other state that requires a bus disconnect. This signal is typically controlled by an end device on the HyperTransport chain that is responsible for initiating a C-state transition.

Its electrical interface uses 1.2 volt Low Voltage Differential Signaling (LVDS).

There has been marketing confusion between the use of HT referring to HyperTransport and the use of HT to refer to Intel's Hyper-Threading feature of their Pentium 4 based microprocessors. Hyper-Threading is known as Hyper-Threading Technology (HTT) or HT-Technology. Because of this potential for confusion, the HyperTransport Consortium always uses the written out form: "HyperTransport".

Applications for HyperTransport

Front-Side Bus Replacement

The primary use for HyperTransport is to replace the front-side bus, which is currently different for every machine (or some set of them). For instance, a Pentium cannot be plugged into a PCI bus. In order to expand the system the front-side bus must connect through adaptors for the various standard buses, like AGP or PCI. These are typically included in a controller called the northbridge
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