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The Peripheral Component Interconnect standard (in practice almost always shortened to PCI) specifies a computer bus for attaching peripheral devices to a computer motherboard. These devices can take the form of:
The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing, and protocols. The specification can be purchased from the (PCISIG). HistoryWork on PCI began at Intel circa 1990. PCI 1.0, which was merely a component-level specification, was released June 22 1992. PCI 2.0, which was the first to establish standards for the connector and motherboard slot, was released on April 30, 1993.PCI was immediately put to use in servers, replacing MCA and EISA as the server expansion bus of choice. In mainstream PCs, PCI was slower to replace VESA Local Bus (VLB), and did not gain significant market penetration until late 1994 in second-generation Pentium PCs. By 1996 VLB was all but extinct, and manufacturers had adopted PCI even for 486 computers. EISA continued to be used alongside PCI through 2000. Apple Computer adopted PCI for professional Power Macintosh computers (replacing NuBus) in mid-1995, and the consumer Performa product line (replacing LC PDS) in mid-1996. Later revisions of PCI added new features and performance improvements, including a 66 MHz 3.3 V standard and 133 MHz PCI-X, and the adaptation of PCI signalling to other form factors. With the introduction of the serial PCI Express standard in 2004, traditional PCI is likely to slowly die out. ConfigurationPCI devices are plug and play. The system firmware examines each device's PCI Configuration Space and allocates resources. Each device can request up to six areas of memory space or I/O port space. They can also have an option ROM that can contain executable x86 or PA-RISC code, Open Firmware or an EFI driver.Interrupts are assigned to the device by firmware rather than being configured by the use of jumpers on the card as was common with ISA devices. While PCI devices are required to have level-triggered interrupts so they can share interrupt numbers, system software will normally try to assign unique interrupts to each device to improve performance. PCI devices must have special hardware in order to support sharing an interrupt port as it needs a way to tell if an interrupt is for itself or for a separate device sharing the IO port. Conventional PCI bus specifications
Conventional PCI variants
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