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x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. The x86 architecture currently dominates the desktop computer, portable computer, and small server markets.

The architecture is called x86 because the earliest processors in this family were identified by model numbers ending in the sequence "86": the 8086, the 80186, the 80286, the 386, and the 486. Because one cannot trademark numbers, Intel and most of its competitors began to use trademarkable names such as Pentium for subsequent generations of processors, but the earlier naming scheme has stuck as a term for the entire family.

The architecture has twice been extended to a larger word size. In 1985, Intel released the 32-bit 386 to replace the 16-bit 286. The 32-bit architecture is called x86-32 or IA-32 (an abbreviation for Intel Architecture, 32-bit). In 2003, AMD introduced the Athlon 64, which implemented a further extension to the architecture to 64 bits, variously called x86-64, AMD64 (AMD), EM64T (Intel), and x64 (Microsoft).

History

The x86 architecture first appeared inside the Intel 8086 CPU in 1978; the 8086 was a development of the 8080 processor (which itself followed the 4004 and 8008). It was adopted (in the simpler 8088 version) three years later as the standard CPU of the IBM PC. The ubiquity of the PC platform has resulted in the x86, with the Zilog Z80, becoming one of the most successful CPU architectures ever.

Other companies also manufacture or have manufactured CPUs conforming to the x86 architecture: examples include Cyrix (now owned by VIA Technologies), NEC Corporation, IBM, IDT (now also owned by VIA), and Transmeta. The most successful of the clone manufacturers has been AMD, whose Athlon series, whilst not as popular as the Pentium series, has a significant marketshare. In 2006 the marketshare of AMD Athlon series CPU in desktop market is greater than Intel Pentium series CPU.

Note that Intel also introduced a separate 64-bit architecture used in its Itanium processors which it calls IA-64 or more recently IPF (Itanium Processor Family). IA-64 is a completely new system that bears no resemblance whatsoever to the x86 architecture; it should not be confused with IA-32, which is essentially synonymous with the 32-bit version of x86.

Design

The x86 architecture is a CISC design with variable instruction length. Word sized memory access is allowed to unaligned memory addresses. Words are stored in the little-endian order. Backwards compatibility has always been a driving force behind the development of the x86 architecture (the design decisions this has required are often criticised, particularly by proponents of competing processors, who are frustrated by the continued success of an architecture widely perceived as quantifiably inferior). Current x86 processors employ a few "extra" decoding steps to (during execution) split (most) x86 instructions into smaller pieces (called "micro-ops") which are then readily executed by a RISC-like micro-architecture.

The x86 assembly language is discussed in more detail in the x86 assembly language article.

Real mode

The Intel 8086 and 8088 had 14 16-bit registers. Four of them (AX, BX, CX, DX) were general purpose (although each had also an additional purpose; for example only CX can be used as a counter with the loop instruction). Each could be accessed as two separate bytes (thus BX's high byte can be accessed as BH and low byte as BL). In addition to them, there are four segment registers (CS, DS, SS and ES). They are used to form a memory address. There are two pointer registers (SP which points to the bottom of the stack, and BP which can be used to point at some other place in the stack or the memory). There are two index registers (SI and DI) which can be used to point inside an array. Finally, there is the flag register (containing flags such as carry, overflow, zero and so on), and the instruction pointer (IP) which points at the current instruction.

In real mode, memory access is segmented. This is done by shifting the segment address left by 4 bits and adding an offset in order to receive a final 20-bit address. For example, if DS is A000h and SI is 5677h, DS:SI will point at the absolute address DS × 16 + SI = A5677h. Thus the total address space in real mode is 2²⁰ bytes, or 1 MiB, quite an impressive figure for 1978. All memory addresses consist of both a segment and offset; every type of access (code, data, or stack) has a default segment register associated with it (for data the register is usually DS, for code it is CS, and for stack it is SS). For data accesses, the segment register can be explicitly specified (using a segment override prefix) to use any of the four segment registers.

In this scheme, two different segment/offset pairs can point at a single absolute location. Thus, if DS is A111h and SI is 4567h, DS:SI will point at the same A5677h as above. In addition to duplicity, this scheme also makes it impossible to have more than four segments at once. Moreover, CS, DS and SS are vital for the correct functioning of the program, so that only ES can be used to point somewhere else. This scheme, which was intended as a compatibility measure with the Intel 8085 has caused no end of grief to programmers.

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